We are looking for an experienced ASIC Verification Engineer to verify our innovative network display ASICs. The role will focus on defining and implementing an SoC verification methodology using next generation verification techniques including high level verification languages.
The role may also involve many or all parts of the flow from block or system level specification and RTL design of modules for use in ASIC or FPGA, through functional verification, synthesis and timing closure, to ...
VentureLoop - 2 years ago
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